hardware digital signal processing blocks  (Xilinx Inc)

Journal: Sensors (Basel, Switzerland)

Article Title: Efficient Hardware Implementation of the Horn-Schunck Algorithm for High-Resolution Real-Time Dense Optical Flow Sensor

doi: 10.3390/s140202860

Figure Lengend Snippet: Resource usage and maximum working frequency of different modules (description in text).

Article Snippet: The standard abbreviations for resources available in Xilinx FPGA devices are used: FF — flip-flops or registers, LUT 6 — look-up table with six inputs and one output, SLICE — slice cells of FPGA, BRAM 18 and 36 — the 2kB or 4kB basic FPGA Block RAM primitive memories, DSP48 - hardware digital signal processing blocks.

Techniques:

Journal: Sensors (Basel, Switzerland)

Article Title: Efficient Hardware Implementation of the Horn-Schunck Algorithm for High-Resolution Real-Time Dense Optical Flow Sensor

doi: 10.3390/s140202860

Figure Lengend Snippet: Resource usage and maximum working frequency of different modules (description in text).

Article Snippet: The standard abbreviations for resources available in Xilinx FPGA devices are used: FF — flip-flops or registers, LUT 6 — look-up table with six inputs and one output, SLICE — slice cells of FPGA, BRAM 18 and 36 — the 2kB or 4kB basic FPGA Block RAM primitive memories, DSP48 - hardware digital signal processing blocks.

Techniques: